Recently, the requirements on nonvolatile memory chips' storage capacity and power consumption have been advancing rapidly. Development of miniaturized and high-speed semiconductor elements is progressing at a similar pace. Resistance varying memory device are being used more often to replace flash memory devices. A resistance varying memory device employs a variable resistance element as a storage element. The resistance varying memory device includes, but is not limited to, ReRAM (Resistive RAM), CBRAM (Conductive Bridging Random Access Memory), phase change RAM (PCRAM), and the like. In a typical resistive memory device, cell material is deposited on a substrate using a conventional method, such as CVD, PVD, or plating. The cell material can be homogenous or non-homogeneous, e.g., consisting of multiple layers. The substrate, including bottom electrodes, can be homogenous or nonhomogeneous, e.g., a combination of metal contacts and a dielectric. A conductive metal layer is deposited on the cell material, acting as the top electrode. Generally, the cell material resistance is changed, for example, from a high-resistance state to a low-resistance state, when a certain voltage is applied to the top electrode.
However, it is difficult to make such a memory cell structure using photoresist masking and plasma etching, because the cell material tends to be complex and may, for example, consist of multiple transitional metal elements. Thus, these advanced cell materials cannot be patterned easily by commercially available dry etching methods. Accordingly, a damascene process is generally used to fabricate the cell structures, where a thick layer (acting as a template layer) is deposited on a substrate and patterned with open trenches where cell material will be deposited. A thick coating of the cell material is then deposited that significantly overfills the trenches in the template layer. The excess cell material above the template layer (referred to as overburden) is removed through chemical-mechanical planarization (CMP), and the template layer is exposed. The template layer is selectively removed or exhumed via a chemical method, a wet strip or a dry strip, and isolated cell structures are fabricated.
However, during the exhumation, the top of the cell materials is impacted or damaged through oxidization or corrosion because of the dry/wet chemical reactions. This degrades the top electrode conductivity and the cell material performance.
Therefore there is a need in the art for a method for forming a semiconductor memory device without degradation of the cell material in accordance with exemplary embodiments of the present invention.